? semiconductor components industries, llc, 2014 september, 2014 ? rev. 4 1 publication order number: ntd5865nl/d ntd5865nl n-channel power mosfet 60 v, 46 a, 16 m features ? low gate charge ? fast switching ? high current capability ? 100% avalanche tested ? these devices are pb?free, halogen free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 60 v gate?to?source voltage ? continuous v gs 20 v gate?to?source v oltage ? non?repetitive (t p < 10 s) v gs 30 v continuous drain current (r jc ) steady state t c = 25 c i d 46 a t c = 100 c 33 power dissipation (r jc ) t c = 25 c p d 71 w pulsed drain current t p = 10 s i dm 203 a operating junction and storage temperature t j , t stg ?55 to 175 c source current (body diode) i s 46 a single pulse drain?to?source avalanche energy (l = 0.1 mh) e as 36 mj i as 27 a lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. thermal resistance maximum ratings parameter symbol value unit junction?to?case (drain) r jc 2.1 c/w junction?to?ambient ? steady state (note 1) r ja 49 1. surface?mounted on fr4 board using a 650 mm 2 , 2 oz. cu pad. dpak case 369aa (surface mount) style 2 marking diagrams & pin assignment 60 v r ds(on) max i d max v (br)dss 16 m @ 10 v http://onsemi.com see detailed ordering and shipping information on page 5 o f this data sheet. ordering information 1 gate 2 drain 3 source 4 drain ayww 58 65nlg a = assembly location* y = year ww = work week 5865nl = device code g = pb?free package g s n?channel d ipak case 369d (straight lead) style 2 1 2 3 4 4 drain 2 drain 1 gate 3 source ayww 58 65nlg 46 a 1 2 3 4 19 m @ 4.5 v * the assembly location code (a) is front side optional. in cases where the assembly location is stamped in the package, the front side assembly code may be blank.
ntd5865nl http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 60 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 55 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 60 v t j = 25 c 1.0 a t j = 150 c 100 gate?to?source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 2.0 v negative threshold temperature co- efficient v gs(th) /t j 5.6 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v, i d = 20 a 13 16 m drain?to?source on resistance r ds(on) v gs = 4.5 v, i d = 20 a 16 19 m forward transconductance gfs v ds = 15 v, i d = 20 a 15 s charges, capacitances and gate resistances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 1400 pf output capacitance c oss 137 reverse transfer capacitance c rss 95 total gate charge q g(tot) v gs = 10 v, v ds = 48 v, i d = 40 a 29 nc threshold gate charge q g(th) 1.1 gate?to?source charge q gs 4 gate?to?drain charge q gd 8 total gate charge q g(tot) v gs = 4.5 v, v ds = 48 v, i d = 40 a 15 nc gate resistance r g 1.3 switching characteristics (note 3) turn?on delay time t d(on) v gs = 10 v, v dd = 48 v, i d = 40 a, r g = 2.5 8.4 ns rise time t r 12.4 turn?off delay time t d(off) 26 fall time t f 4.4 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 40 a t j = 25 c 0.95 1.2 v t j = 125 c 0.85 reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/ s, i s = 40 a 20 ns charge time ta 13 discharge time tb 7 reverse recovery charge q rr 13 nc product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures.
ntd5865nl http://onsemi.com 3 typical characteristics 0 10 20 30 40 50 60 70 80 012345 figure 1. on?region characteristics v ds , drain?to?source voltage (v) i d , drain current (a) v gs = 10 v t j = 25 c 4.5 v 4 v 3.8 v 3.6 v 3.4 v 3.2 v 3 v 2.8 v 2.6 v 0 10 20 30 40 50 60 70 80 1234 5 v ds 10 v t j = ?55 c t j = 125 c figure 2. transfer characteristics v gs , gate?t o?source voltage (v) i d , drain current (a) t j = 25 c 0.010 0.015 0.020 0.025 0.030 2345678910 figure 3. on?resistance vs. gate voltage v gs , gate?t o?source voltage (v) r ds(on) , drain?to?source resistance ( ) t j = 25 c i d = 40 a 0.010 0.012 0.014 0.016 0.018 5 1015202530354 0 figure 4. on?resistance vs. drain current i d , drain current (a) r ds(on) , drain?to?source resistance ( ) v gs = 10 v t j = 25 c v gs = 4.5 v figure 5. on?resistance variation with temperature r ds(on) , drain?to?source resistance (normalized) 100 1000 10000 10 20 30 40 50 6 0 figure 6. drain?to?source leakage current vs. voltage v ds , drain?to?source voltage (v) i dss , leakage (na) t j = 125 c t j = 150 c v gs = 0 v 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 ?50 ?25 0 25 50 75 100 125 175 t j , junction temperature ( c) v gs = 10 v i d = 38 a 2.2 150
ntd5865nl http://onsemi.com 4 typical characteristics 0 200 400 600 800 1000 1200 1400 1600 1800 0 102030405060 figure 7. capacitance variation v ds , drain?to?source voltage (v) c, capacitance (pf) t j = 25 c v gs = 0 v c iss c oss c rss 0 2 4 6 8 10 0 5 10 15 20 25 3 0 q gs q t q gd figure 8. gate?to?source vs. total charge q g , total gate charge (nc) v gs , gate?t o?source voltage (v) v ds = 48 v i d = 40 a t j = 25 c 1 10 100 1000 1 10 100 figure 9. resistive switching time variation vs. gate resistance r g , gate resistance ( ) t, time (ns) v dd = 48 v i d = 40 a v gs = 10 v t d(off) t d(on) t r t f 0 5 10 15 20 25 30 35 40 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.0 0 figure 10. diode forward voltage vs. current v sd , source?to?drain voltage (v) i s , source current (a) t j = 25 c v gs = 0 v 0.1 1 10 100 1000 0.1 1 10 100 v ds , drain?to?source voltage (v) i d , drain current (a) figure 11. maximum rated forward biased safe operating area 10 s 100 s 1 ms dc 10 ms r ds(on) limit thermal limit package limit v gs = 10 v single pulse t c = 25 c
ntd5865nl http://onsemi.com 5 typical characteristics 0.01 0.1 1 10 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 figure 12. thermal response t, pulse time (s) r jc(t) ( c/w) effective transient thermal resistance 0.02 0.2 0.01 0.05 duty cycle = 0.5 single pulse 0.1 ordering information order number package shipping ? ntd5865nl?1g ipak (straight lead) (pb?free) 75 units / rail ntd5865nlt4g dpak (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntd5865nl http://onsemi.com 6 package dimensions dpak (single guage) case 369aa issue b b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw style 2: pin 1. gate 2. drain 3. source 4. drain
ntd5865nl http://onsemi.com 7 package dimensions 123 4 v s a k ?t? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak case 369d issue c style 2: pin 1. gate 2. drain 3. source 4. drain on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ntd5865nl/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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